摘要

Full-adders are essential parts of digital circuits whereby many arithmetic circuits can be implemented by applying these cells. Therefore speed and power consumption of full-adders affect the performance of digital circuits, FA cell performs a predominant arithmetic operation in them. We utilise carbon nanotube field effect transistors for implementing our proposed designs due to their unique mechanical and electrical properties such as lower delay, lower power consumption, very dense and lower current off. Extensive simulation results using HSpice are reported to demonstrate the acquired significant improvement in performance of FA circuit design in comparison with the state-of-the-art work.

  • 出版日期2013-6-1

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