A high-PSRR low-power CMOS voltage reference based on weighted V-GS difference

作者：Yousefi Somayeh; Jalali Mohsen^*

来源：AEU-International Journal of Electronics and Communications, 2016, 70(1): 50-57.

DOI：10.1016/j.aeue.2015.09.019

• Voltage reference
• Power supply rejection
• Subthreshold
• Low power consumption

A high PSRR CMOS voltage reference circuit suitable for applications with noisy environments like power telemetry solutions and system on a chip (SOC) integrations is presented. The reference voltage is generated based on the difference between weighted gate-to-source voltages (V-GS) of MOS transistors operating in subthreshold region. The circuit PSRR is improved using a new circuit configuration which removes the need for a passive resistive branch to scale up V-GS voltages. The PSRR is further enhanced by reordering the pole-zero locations of the PSRR transfer function and then using supply-independent biasing circuit. Implemented in a 0.18 mu m standard CMOS process, the circuit occupies an area of about 0.035 mm(2). The minimum supply voltage is 1.4V and the maximum temperature coefficient is about 82 ppm/degrees C. The PSRR at 100 Hz and 10 MHz frequencies are approximately -70 dB and -100 dB respectively. Using a 1.8V supply voltage, it consumes at least 42 nA and at most 125 nA depending on operating temperature and process corners.

• 出版日期2016