科研之友
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摘要
A new bumping process on a Si die by electroplating without a photo resist mold (PRM) was assessed for the three dimensional (3D) stacking of Si dice In this process solder bumps were deposited selectively onto the surface of a Cu plugged through silicon via (TSV) in a Si die Since lithography related processes to make a PRM for solder bumping were omitted it can reduce the production tune and cost for bumping The substrate was a Si wafer and TSVs were produced by deep ion reactive etching (DRIE) As an insulation layer SiO2 was formed by high density plasma chemical vapor deposition (HDPCVD) or wet oxidation method A Ti adhesion and an Au seed layers were deposited by sputtering Cu was plugged into the vias by pulsed direct current (DC) electroplating The backside of the Si water was ground by chemical mechanical polishing (CMP) Sn bumps were electroplated on the Cu plugged vias by a current supplied through a Cu overplated layer (COL), on the vias surface As experimental results wet oxidation provided a uniform SiO2 thickness through the via depth whereas the SiO2 thickness by HDPCVD decreased with the via depth The Ti and Au thicknesses also decreased along the via depth In electroplating for Cu plugging defect free Cu plug was achieved by pulsed DC for 18 h where one cycle composed of a 5s cathodic term with -12 2 mA cm(-2) and a 25s anodic term with 2 3 mA cm(-2) Sn bumping using COL without PRM was accomplished successfully at a current density of -30 mA cm-2 tor 15 min The diameter and height of the Sn bumps ranged from 48 5 to 52 mu m and 22 to 25 mu m respectively The bumps had a rivet head shape without a columnar part and showed facets on the bump surface 1 he COL was removed by CMP without damage to the bumps [doi 10 2320/matertrans M2009314]
- 出版日期2010-10
