A novel trench SOI LDMOS with a dual floating vertical field plate

作者：Cheng, Kun; Hu, Shengdong^*; Lei, Jianmei; Yuan, Qi; Jiang, Yuyu; Huang, Ye; Yang, Dong; Lin, Zhi; Zhou, Xichuan; Tang, Fang

来源：Superlattices and Microstructures, 2017, 109: 134-144.

DOI：10.1016/j.spmi.2017.04.047

• Silicon-on-insulator
• Dual floating vertical field plate
• Breakdown voltage
• Specific on-resistance

A novel trench SOI LDMOS with a dual floating vertical field plate structure (DFVFPT SOI) is proposed in this paper. A dual floating vertical plate (DFVFP) is introduced into the filled oxide trench of a conventional trench SOI LDMOS (CT SOI). The DFVFP modulates the distribution of the electric field in the drift region especially the trench surface region, which enhances the internal electric field and effectively prevents premature breakdown, thus increasing the breakdown voltage (BV). At the same time, the doping concentration of the drift region (Nd) is increased because of the assistant depletion effect of DFVFP and a lower specific on-resistance (R-on,(sp)) is therefore obtained. Compared with the CT SOI, the Ron,sp of the FVFPT SOI can be reduced by more than 35% when its BV can be increased by 27%, and the figure-of-merit (FOM) is enhanced by 145%. Compared with the several structures proposed before, the DFVFPT SOI better improves the tradeoff between BV and Ron,sp.

• 出版日期2017-9
• 单位重庆大学