A Comparative Study of Gate Structures for 9.4-kV4H-SiC Normally On Vertical JFETs

作者：Sung Woongje^*; Van Brunt Edward; Baliga B Jayant; Huang Alex Q

来源：IEEE Transactions on Electron Devices, 2012, 59(9): 2417-2423.

DOI：10.1109/TED.2012.2203337

• High voltage
• JFET
• normally on
• silicon carbide
• 4H-SiC

This paper reports the development of 9.4-kV 4H-SiC normally on lateral-channel vertical JFETs. The developed JFETs utilize a buried layer to create a lateral conduction channel, shielding the source from the effects of drain bias. The lowest measured R-on,(sp) was 127 m Omega.cm(2). Measurements indicate that the channel resistivity can be further reduced by channel optimization. The fabricated JFETs exhibit pentode-like I-D-V-DS characteristics with a high forward direct-current blocking gain of over 500. This paper provides a comparative study of gate structures in order to achieve the lowest ON-state switching losses and to provide stable forward blocking characteristics for a normally on JFET.

• 出版日期2012-9