A Hybrid Current-Limiting Circuit for DC Line Fault in Multiterminal VSC-HVDC System

作者：Liu, Jian^*; Tai, Nengling; Fan, Chunju; Chen, Shi

来源：IEEE Transactions on Industrial Electronics, 2017, 64(7): 5595-5607.

DOI：10.1109/TIE.2017.2677311

• DC line
• energy dissipation
• fault current
• fault detection
• multiterminal VSC-HVDC
• protection

The high fault current of dc line is a major threat to multiterminal voltage-source-converter-based HVDC (VSC-HVDC) system. However, dc circuit breaker (DCCB) with large capacity and fast breaking speed is still under development. Therefore, fault current limitation is vital for the multiterminal VSC-HV DC system. This paper proposes a simple and easily applied hybrid current-limiting circuit (HCLC) at dc side, which consists of a current-limiting inductor (CLI) and an energy dissipation circuit (EDC) in parallel with the CLI. The CLI is designed to reduce the requirement for the DCCB's capacity and breaking speed. The EDC, which consists of thyristor-controlled resistors, is proposed to reduce the stress on energy absorption element (metal oxide arrester) in DCCB and to accelerate the fault current interruption. The design and discussion about the HCLC parameters are performed in detail. By employing the proposed HCLC, dc line fault in the multiterminal system can be isolated effectively with existing DCCB technology, and fast system restoration without power interruption of healthy part can be achieved. Numerous simulations with real-time digital simulator and comparisons with traditional schemes have demonstrated the promising performance of the proposed HCLC. The effectiveness of the HCLC's topology has also been verified by a simplified and scaled test circuit.

• 出版日期2017-7
• 单位上海交通大学