A 24-dB K-u-band low-power linearized 90-nm amplifier with a built-in output buffer

作者：Roy Apratim^*

来源：AEU-International Journal of Electronics and Communications, 2013, 67(7): 602-610.

DOI：10.1016/j.aeue.2013.01.002

• Low-power amplifier
• Integrated buffer
• Layout sensitive analysis
• K-u-band

In this paper, we present a 90-nm high gain (24 dB) linearized CMOS amplifier suitable for applications requiring high degree of port isolation in the K-u-band (13.2-15.4 GHz). The two-stage design is composed of a low-noise common-gate stage and a gain-boosting cascode block with an integrated output buffer for measurement. Optimization of input stage and load-port buffer parameters improves the front-end's linear coverage, port return-loss, and overall gain without burdening its power demand and noise contribution. With low gate bias voltages (0.65-1.2 V) and an active current source, <-10 dB port reflection loss and 3.25-3.41 dB NF are achieved over the bandwidth. The input reflection loss of the overall amplifier lies between -35 and -10 dB and the circuit demonstrates a peak forward gain of 24 dB at 14.2 GHz. The output buffer improves the amplifier's forward gain by similar to 9 dB and pushes down the minimum output return loss to -22.5 dB while raising the front-end NF by only 0.05 dB. The effect of layout parasites is considered in detail in the 90-nm process models for accurate RF analysis. Monte Carlo simulation predicts 9% and 8% variation in gain and noise figures resulting from a 10% mismatch in process. The K-u-band amplifier including the buffer block consumes 7.69 mA from a 1.2-V supply. The proposed circuit techniques achieve superior small signal gain. GHz-per-milliwatt, and range of linearity when compared with simulated results of reported microwave amplifiers.

• 出版日期2013