A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector

作者：Choi Kwang Chun^*; Lee Seung Woo; Lee Bhum Cheol; Choi Woo Young

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2012, 59(3): 143-147.

DOI：10.1109/TCSII.2012.2184370

• Counter
• multiphase clock
• sampling error correction
• time-to-digital converter (TDC)

A new type of sampling error corrector for a time-to-digital converter (TDC) having a multiphase reference clock and a binary counter is demonstrated. With this corrector, sampling errors caused by asynchronous TDC inputs are corrected without requiring additional counters or reclocking circuits. A TDC having the corrector is implemented in 90-nm CMOS logic technology. It has 13.6-ps/least significant bit resolution and 13-bit input dynamic range. It consumes 18 mW from a 1.2-V supply and occupies a 100 x 210 mu m(2) chip area.

• 出版日期2012-3