A Front-End ASIC With Receive Sub-array Beamforming Integrated With a 32 x 32 PZT Matrix Transducer for 3-D Transesophageal Echocardiography

作者：Chen Chao^*; Chen Zhao; Bera Deep; Raghunathan Shreyas B; Shabanimotlagh Maysam; Noothout Emile; Chang Zu Yao; Ponte Jacco; Prins Christian; Vos Hendrik J; Bosch Johan G; Verweij Martin D; de Jong Nico; Pertijs Michiel A P

来源：IEEE Journal of Solid-State Circuits, 2017, 52(4): 994-1006.

DOI：10.1109/JSSC.2016.2638433

• 3-D ultrasound imaging
• matrix transducer arrays
• sub-array beamforming
• transesophageal echocardiography(TEE)
• ultrasound application-specific integrated circuit (ASIC)

This paper presents a power-and area-efficient front-end application-specific integrated circuit ( ASIC) that is directly integrated with an array of 32 x 32 piezoelectric transducer elements to enable next-generation miniature ultrasound probes for real-time 3-D transesophageal echocardiography. The 6.1 x 6.1 mm 2 ASIC, implemented in a low-voltage 0.18-mu m CMOS process, effectively reduces the number of receive ( RX) cables required in the probe's narrow shaft by ninefold with the aid of 96 delay-and-sum beamformers, each of which locally combines the signals received by a sub-array of 3x3 elements. These beamformers are based on pipeline-operated analog sample-andhold stages and employ a mismatch-scrambling technique to prevent the ripple signal associated with the mismatch between these stages from limiting the dynamic range. In addition, an ultralowpower low-noise amplifier architecture is proposed to increase the power efficiency of the RX circuitry. The ASIC has a compact element matched layout and consumes only 0.27 mW/channel while receiving, which is lower than the state-of-the-art circuit. Its functionality has been successfully demonstrated in 3-D imaging experiments.

• 出版日期2017-4