Embedded network camera processor system on a chip for various low-power multimedia applications

作者：Park Jongsu; Moon Sangook; Oh Seung Ho; Lee Yong Surk^*

来源：Telecommunication Systems, 2015, 60(2): 251-260.

DOI：10.1007/s11235-015-0027-4

• Network camera processor
• System on a chip (SoC)
• Remote security
• Home security

In this paper we present an embedded network camera processor (NCP) system on a chip (SoC) for various low-power multimedia applications. The NCP SoC comprises a digital camera processor optimized for a CCD sensor, a motion JPEG encoder to compress the data, an Ethernet controller to transmit the data, ARM processor and many peripherals. Using the NCP SoC allows the raw image from a CCD sensor to be filtered, compressed and transmitted anywhere through various Ethernet protocols, with no additional hardware. The NCP SoC is designed with Verilog-HDL. Also, we followed a strict ASIC flow including functional behavior verification and a scan test. The NCP SoC is fabricated with 0.25 CMOS technology. The total chip size, including embedded memory, is and the gate count is 1.2 million. The NCP SoC runs at up to 48 MHz, and supports various slower clock frequencies for low-power applications requiring additional power saving modes: 6 MHs, 12 and 24 MHz at 2.5 V.

• 出版日期2015-10