Novel Boosted-Voltage Sensing Scheme for Variation-Resilient STT-MRAM Read

作者：Quang Kien Trinh^*; Ruocco Sergio; Alioto Massimo

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2016, 63(10): 1652-1660.

DOI：10.1109/TCSI.2016.2582203

• Dynamic voltage scaling
• read margin
• resiliency
• spintronics
• STT-MRAM
• variations

This paper proposes a novel boosted voltage sensing (BVS) scheme that substantially improves the resiliency of STT-MRAMs against variations in read accesses based on bitline voltage sensing, and on a wide range of voltages. The BVS scheme mitigates the impact of variations in the senseamp and the reference voltage generation, and is based on switched-capacitor voltage boosters. The related area-performance-energy-resiliency tradeoff is explored, and design guidelines are derived to improve the read margin at minimum overhead. BVS improves the array read decision error rate to the extent that it approaches the intrinsic bitcell error rate, which is well known to represent a fundamental lower bound for the read error rate. Results in 65 nm show that the proposed BVS improves the read decision error rate by two orders of magnitude in the 0.65-1.2 V range, with only 4% (20%) energy (delay) overhead at same area.

• 出版日期2016-10