摘要

The advancement of power MOSFET fabrication technology has aided the reduction of power stage errors in class-D amplifiers (amps). This reduction reveals intrinsic distortion, which is a key performance limiter in modern pulsewidth-modulation (PWM)-based class-D amps. In this brief, a dual-feedforward carrier modulation topology is proposed to reduce the intrinsic harmonic distortion of a second-order loop filter class-D amp. The proposed design achieves a total harmonic distortion of less than 0.01% for input frequency up to 6 kHz, and it has an idle carrier frequency of 310 kHz. Such low carrier frequency is particularly important in high-power devices as it guarantees low switching loss. Moreover, the carrier frequency varies in a narrow range in the presence of an input signal and helps to suppress the audible intermodulation distortion in multichannel applications. The prototype circuit is implemented and tested on a printed circuit board using discrete components.

  • 出版日期2012-1
  • 单位南阳理工学院