A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems

作者：Serrano Gotarredona Teresa; Prodromakis Themistoklis; Linares Barranco Bernabe

来源：IEEE Circuits and Systems Magazine, 2013, 13(2): 74-88.

DOI：10.1109/MCAS.2013.2256271

Recent research in nanotechnology has led to the practical realization of nanoscale devices that behave as memristors, a device that was postulated in the seventies by Chua based on circuit theoretical reasonings. On the other hand, neuromorphic engineering, a discipline that implements physical artifacts based on neuroscience knowledge, has related neural learning mechanisms to the operation of memristors. As a result, neuro-inspired learning architectures can be proposed that exploit nanoscale memristors for building very large scale systems with very dense synaptic-like memory elements. At present, the deep understanding of the internal mechanisms governing memristor operation is still an open issue, and the practical realization of very large scale and reliable %26quot;memristive fabric%26quot; for neural learning applications is not a reality yet. However, in the meantime, researchers are proposing and analyzing potential circuit architectures that would combine a standard CMOS substrate with a memristive nanoscale fabric on top to realize hybrid memristor-CMOS neural learning systems. The focus of this paper is on one such architecture for implementing the very well established Spike-Timing-Dependent-Plasticity (STD P) learning mechanism found in biology. In this paper we quickly review spiking neural systems, STD P learning, and memristors, and propose a hybrid memristor-CMOS system architecture with the potential of implementing a large scale STD P learning spiking neural system. Such architecture would eventually allow to implement real-time brain-like processing

• 出版日期2013