摘要

Distributed track-and-hold (T/H) circuit is widely used in folding and interpolating analog-to-digital (A/D) converters as a good candidate of single T/H circuits for an optimum overall system performance. But, rigorous analysis and method for design do not exist. This paper brings averaging network to suppress the random offset voltages of the differential difference pre-amplifiers (DDPAs), which locate before T/H circuit featuring two differential inputs for the requirement of fully differential A/D converters. The first contribution of this work is to present the exact expressions for the output voltage and gain in S-domain, the integral nonlinearity (INL) and differential nonlinearity (DNL) in DDPAs through the further insight into this architecture. Furthermore, distortion resulting from settling time limitation, interpolation error, folder offset, and all sources of mismatch in averaged DDPAs is considered. In addition, the figure of merit for INL and DNL is proposed to quantify the effectiveness of averaging and be served as the guideline for the optimum design. Finally, these theoretical results were verified against Hspice simulations from a design example of distributed T/H circuits for 8-bit 250MHz folding and interpolating A/D converter, which confirmed the accurate and exhaustive analysis and exhibited a good agreement.