An On-Chip Network Fabric Supporting Coarse-Grained Processor Array

作者：Phi Hung Pham^*; Phuong Mau; Kim Jungmoon; Kim Chulwoo

来源：IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2013, 21(1): 178-182.

DOI：10.1109/TVLSI.2011.2181546

• Coarse grained array (CGA)
• network-on-chip (NoC)
• on-chip communication network
• reconfigurable computing

Coarse grained arrays (CGAs) with run-time reconfigurability play an important role in accelerating reconfigurable computing applications. It is challenging to design on-chip communication networks (OCNs) for such CGAs with dynamic run-time reconfigurability whilst satisfying the tight budgets of power and area for an embedded system. This paper presents a silicon-proven design of a 64-PE circuit-switched OCN fabric with a dynamic path-setup scheme capable of supporting an embedded coarse-grained processor array. A proof-of-concept test chip fabricated in a 0.13 mu m CMOS process occupies a silicon area of 23 mm(2) and consumes a peak power of 200 mW @ 128 MHz and 1.2 Vcc, at room temperature. The OCN overhead consumes 9.4% of the area and 18% of the power of the total chip. Experimental results and analysis show that the proposed OCN fabric with its dynamic path-setup is suitable for use in an embedded CGA supporting fast run-time reconfigurability.

• 出版日期2013-1