摘要

A low-power, low-supply, low-complexity all-MOSFET voltage reference is implemented in 0.18 mu m CMOS process. With the proposed architecture, the number of the transistors can be reduced to the greatest extent. As a result, the supply voltage can not only be decreased to as low as 0.7 V, but the power consumption can also be optimized significantly. Simulation results show that the power consumption is 47 nW, at a supply of 0.7 V. A temperature coefficient (TC) of 42 ppm/degrees C is achieved when the temperature ranges from -20 degrees C to 80 degrees C. At room temperature, the voltage reference features a line regulation (LR) of 2.66%/V.