摘要

This letter presents a three-phase VCO consisted of three identical single-ended Clapp pMOSFET VCOs coupled by a pMOSFET ring and tail inductors. The three-phase circuit operation is based on the interaction of frequency tripler and divide-y-3 injection-locked frequency divider in addition to the MOSFET-ring coupling. The fully integrated 8.5 GHz three-phase VCO was fabricated in 90 nm CMOS process, the frequency tuning range is from 8.08 to 8.94 GHz and the VCO-core power consumption is 4.04 mW at the supply voltage of 0.88 V. The measured phase noise is -117.18 dBc/Hz at 1 MHz offset frequency from the carrier frequency 8.822 GHz. The VCO occupies a chip area of 0.864 x 0.76 mm(2) and provides a figure of merit of -190.1 dBc/Hz. The phase noise is reduced through optimizing capacitor value in the Colpitts negative resistance cell.

  • 出版日期2015-11