摘要

This letter presents an L-band highly linear differential low noise amplifier (LNA) in a standard 90-nm CMOS process. A wide range derivative superposition technique is proposed to maximize the third-order intercept point (IP3), and at the same time, minimize the third-order intermodulation distortion (IMD3) over a wide input power range. The LNA chip achieves a measured OIP3 of +33.7 dBM and IMD3 of -65 dBc with -15 dBM input power. The measured peak gain and minimum noise figure are 15.4 dB and 1.36 dB at 1.27 GHz, respectively. The LNA chip consumes 40 mA from a 3.3-V supply.