A Frequency-Folded ADC Channelizer With Digital Equalization and Relaxed Anti-Alias Filtering

作者：Singh Vineet Kumar^*; Ho Wei Gi; Gharpurey Ranjit

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65(7): 2304-2317.

DOI：10.1109/TCSI.2017.2776918

• Frequency-folded ADC
• broadband channelizer
• wideband receiver
• N-path
• anti-aliasing filter
• harmonic rejection mixer
• aliased data recovery
• software defined radio front-end
• digital equalization
• image rejection
• LO synthesis
• harmonic mixing
• mismatch
• passive mixer
• noise cancellation
• programmable frequency
• direct-conversion
• direct sampling

This paper presents a mixed-signal broadband channelizer that employs digital post-processing for reducing the analog anti-aliasing requirement in an N-path frequency-folding receiver architecture. In the approach, a signal of bandwidth Nf(LO)/2 is downconverted using N phases of a rectangular pulse waveform at a fundamental frequency of f(LO) with a duty-cycle of 1/N. All parts of the input are aliased onto a baseband signal of bandwidth f(LO)/2, which is low-pass filtered and applied to an analog-to-digital converter (ADC), with each path employing identical sampling clocks. A digital equalization technique is described that can be utilized to recover the complete broadband input similar to a high-speed ADC, or recover each channelized and down-converted sub-band, similar to a bank of mixers while performing digital-domain harmonic and image rejection. The equalization technique is analyzed in the context of a previously demonstrated channelizer IC. It is shown that the application of the equalization can result in 50-dB broadband SNR over 1-GHz input bandwidth, using eight paths with 10-bit sub-ADCs, with third-order anti-aliasing analog filters. Signal reconstruction methodologies for a multi-tone input and for signals that are aperiodic in the processing window are also described.

• 出版日期2018-7