A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

作者：Li, Y. -Q.^*; Wang, H. -B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S. -T.; He, A. -L; Guo, G.; Baeg, S. H.; Wen, S. -J.; Wong, R.; Chen, M.; Wu, Q.

来源：IEEE Transactions on Nuclear Science, 2017, 64(6): 1554-1561.

DOI：10.1109/TNS.2017.2704062

• Flip-Flop
• Quatro
• radiation hardness by design (RHBD)
• soft error

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.

• 出版日期2017-6
• 单位中国石油大学（北京）; Saskatoon; Cisco; 中国原子能科学研究院; Saskatchewan