摘要

Implementation of highly integrated optical receivers in CMOS promises low cost, but combining high gain, low noise, high bandwidth, and low power in a CMOS transimpedance amplifier is a challenge. Fortunately, the sensitivity of an optical receiver is improved by limiting its frontend bandwidth far below the symbol rate and using equalization to eliminate the resulting intersymbol interference (ISI). Analysis reveals that when using a decision-feedback equalizer (DFE) to cancel all postcursor ISI, receiver sensitivity is optimized by taking a front-end bandwidth as low as 0.12 fbit, depending upon the frequency response and noise spectrum assumed for the front end. This paper presents a 20 Gb/s optical receiver with a front-end bandwidth of 3 GHz. The front end is designed to have an approximately first-order response, ensuring only postcursor ISI, which may be efficiently canceled with a first-order infinite-impulse response DFE (IIR-DFE). An IIR-DFE circuit is also proposed that obviates the need for an explicit full-rate multiplexor. Fabricated in 65 nm CMOS, the receiver achieves 0.705 pJ/b efficiency with the IIR-DFE consuming 150 fJ/b. Using a photodiode with 12 GHz analog bandwidth and responsivity of 0.5 A/W, the receiver has a sensitivity of -5.8 dBm optically modulated amplitude.

  • 出版日期2016-11