摘要

This paper proposes a sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for millimeter-wave Time-division Duplexing (TDD) transceivers. The proposed synthesizer is capable of supporting all 60 GHz channels (58.1-65 GHz) including channel-bonding defined by 60 GHz wireless standards for short-range high-speed wireless communications. In order to guarantee a robust performance over process-voltage-temperature (PVT) variations of the conventional frequency synthesizer, a frequency calibration scheme is proposed to automatically correct a frequency drift of quadrature injection locked oscillators. Implemented by a 65 nm CMOS process, the frequency synthesizer achieves a typical phase noise of -117 dBc/Hz @ 10 MHz offset from a carrier frequency of 61.56 GHz while consuming 72 mW from a 1.2 V supply. The calibration system consumes 65 mW additionally.

  • 出版日期2013-7