摘要

This letter presents a low voltage quadrature divide-by-4 (empty set 4) injection-locked frequency divider (QILFD). The QILFD consists of a 1.8-GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are inserted into the quadrature outputs of the QVCO for signal injection. The low-voltage CMOS empty set 4 QILFD has been implemented with the TSMC 0.18-mu m 1P6 M CMOS technology and the core power consumption is 3.12 mW at the supply voltage of 1.2 V. The free-running frequency of the QILFD is tunable from 1.73 to 1.99 GHz, the measured phase noise of QILFD is -118 dBc/Hz at 1-MHz offset from the free running frequency of 1.82 GHz. At the input power of 0 dBm, the total locking range is from 6.86 to 8.02 GHz; as the tuning voltage is varied from 0 to 1.2 V. The phase noise of the locked output spectrum is lower than that of free running ring oscillator by 11 dBc/Hz. The phase deviation of quadrature output is about 0.8 degrees.

  • 出版日期2007-5