Deeper SSC estimator used as CDR

作者：Zhang Yaming^*; Gai Weixin

来源：Electronics Letters, 2013, 49(11): 691-U124.

DOI：10.1049/el.2012.4086

A deeper SSC estimator used as a CDR with a low power mechanism based on third-order architecture is proposed to suppress the disadvantage of the conventional third-order CDR happening at the switching points of SSC (spread spectrum clocking). For 10 Gbit/s data speed, the depth of its SSC tracking may be up to 10000ppm at 30 kHz which helps to reduce more EMI.

• 出版日期2013-5-23
• 单位北京大学