A Mismatch-Immune 12-Bit SAR ADC With Completely Reconfigurable Capacitor DAC

作者：Collins, Nicholas^*; Tamez, Andres; Jie, Lu; Pernillo, Jorge; Flynn, Michael P.

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2018, 65(11): 1589-1593.

DOI：10.1109/TCSII.2017.2775243

• Analog-digital conversion
• analog integrated circuits
• analog-digital integrated circuits
• asynchronous circuits
• CMOS integrated circuits
• field programmable analog arrays
• sampled data circuits
• rail to rail inputs
• reconfigurable architecture
• reconfigurable devices
• calibration

We overcome mismatch constraints of capacitor DAC design in SAR ADCs using a completely reconfigurable DAC with content addressable memory beneath groupings of unit capacitors. We demonstrate a linearity optimization technique in simulation and measurement. We achieve a nearly 2-bit repeatable ENOB improvement with a peak of 11.3 bits.

• 出版日期2018-11
• 单位浙江大学