Asymmetric dual-gate-structured one-transistor dynamic random access memory cells for retention characteristics improvement

作者：Kim Hyungjin; Lee Jong Ho; Park Byung Gook^*

来源：Applied Physics Express, 2016, 9(8): 084201.

DOI：10.7567/APEX.9.084201

One of the major concerns of one-transistor dynamic random access memory (1T-DRAM) is poor retention time. In this letter, a 1T-DRAM cell with two separated asymmetric gates was fabricated and evaluated to improve sensing margin and retention characteristics. It was observed that significantly enhanced sensing margin and retention time over 1 s were obtained using a negatively biased second gate and trapped electrons in the nitride layer because of increased hole capacity in the floating body. These findings indicate that the proposed device could serve as a promising candidate for overcoming retention issues of 1T-DRAM cells.

• 出版日期2016-8