A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback

作者：Hatano Hiroshi^*

来源：IEICE - Transactions on Electronics, 2011, E94C(6): 1131-1134.

DOI：10.1587/transele.E94.C.1131

• cascade voltage switch logic
• single event effect
• exclusive-OR
• radiation
• simulation

Clocked cascade voltage switch logic ((CVSL)-V-2) circuits with gated feedback were newly designed for synchronous systems. In order to investigate single event transient (SET) effects on the (CVSL)-V-2 circuits, SET effects on (CVSL)-V-2 EX-OR circuits were analyzed using SPICE. Simulation results have indicated that the (CVSL)-V-2 have increased tolerance to SET.

• 出版日期2011-6