摘要

This paper presents a high power-efficient low voltage differential signaling (LVDS) output driver with adjustable feed-forward capacitor compensation. Compared to conventional LVDS output driver, the proposed output driver helps to significantly reduce the requirement of driving capability of pre-driver by increasing the rising and falling time of outputs. In addition, its output swing is adjustable based on different loadings. The proposed LVDS output driver consumes 3.04 mW with a transmission data rate of 6 Gb/s, achieving a power efficiency of 0.51 mW/Gb/s. This output driver circuit is implemented in a 65 nm CMOS process with a core area of 0.025 mm(2).