A 14-bit 250 kS/s two-step inverter-based incremental Sigma Delta ADC for CMOS image sensor in 0: 18 lm technology

作者:Bisiaux, Pierre*; Lelandais Perrault, Caroline; Kolar, Anthony; dos Santos, Filipe Vinci; Benabes, Philippe
来源:Analog Integrated Circuits and Signal Processing, 2018, 97(3): 427-435.
DOI:10.1007/s10470-018-1238-x

摘要

This paper presents a 14-bit Incremental Sigma-Delta (Sigma Delta) analog-to-digital converter suitable for column wise integration in a CMOS image sensor. A two step conversion is performed to improve the conversion speed. As the same Sigma Delta modulator is used for both steps, the overall complexity is reduced. Furthermore, the use of inverter-based amplifiers instead of operational transconductance amplifier facilitates the integration within the column pitch and decreases power consumption. MonteCarlo simulations have been done in order to validate the design of the inverter. The proposed ADC is designed in 0.18 mu m CMOS technology. The simulation is performed with a 1.8 V voltage supply, a 20 MHz system clock frequency and an oversampling ratio (OSR) of 70, and achieves a power consumption is 460 mu W, a SNDR of 85.4 dB at a sampling rate of 250 kS/s.

  • 出版日期2018-12

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