摘要
A new current-reused injection-locked frequency divider is proposed to generate quadrature outputs and implemented using the standard UMC 0.18 mu m CMOS 1P6M process. The proposed circuit is made of two LC-tank voltage controlled oscillators (VCOs) stacked in series and the VCOs are coupled with the coupling transistors to generate quadrature signals. The direct injection-locked technique is applied to the VCO to perform a divide by two functions, so that the quadrature circuit can provide low phase noise signal. At the 1.8 V supply voltage, the free running frequency of proposed circuit operates from 2.3 to 2.63 GHz and provides 1 GHz locking from 4.43 to 5.43 GHz. The power consumption is 7.4 mW with 4.1 mA current consumption.
- 出版日期2007-8