Design and analysis of a mesh-based wireless network-on-chip

作者：Hu Wen Hsiang; Wang Chifeng^*; Bagherzadeh Nader

来源：Journal of Supercomputing, 2015, 71(8): 2830-2846.

DOI：10.1007/s11227-014-1341-4

• Wireless network-on-chip
• Network-on-chip
• On-chip interconnection network

Network-on-chip (NoC) architecture is regarded as a solution for future on-chip interconnects. However, the performance advantages of conventional NoC architectures are limited by the long latency and high power consumption due to multi-hop long-distance communication among processing elements. To solve these limitations, we employed on-chip wireless communication as express links for transferring data so that transfer latency can be reduced. A hybrid NoC architecture utilizing both wired and wireless communication approaches is proposed in this paper. We also devised a deadlock-free routing algorithm that is able to make efficient use of the incorporated wireless links. Moreover, simulated annealing optimization techniques were applied to find optimal locations for wireless routers. Cycle-accurate simulation results showed a significant improvement in transfer latency. Area and power consumption analysis demonstrates the feasibility of our proposed NoC architecture.

• 出版日期2015-8