Efficient FPGA Implementation of Address Generator for WiMAX Deinterleaver

作者：Upadhyaya Bijoy Kumar^*; Sanyal Salil Kumar

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2013, 60(8): 492-496.

DOI：10.1109/TCSII.2013.2268372

• Digital circuits
• error correction
• field-programmable gate arrays (FPGAs)
• wireless systems

In this brief, a low-complexity and novel technique is proposed to efficiently implement the address generation circuitry of the 2-D deinterleaver used in the WiMAX transreceiver using the Xilinx field-programmable gate array (FPGA). The floor function associated with the implementation of the steps, required for the permutation of the incoming bit stream in channel interleaver/deinterleaver for IEEE 802.16e standard is very difficult to implement in FPGA. A simple algorithm along with its mathematical background developed in this brief, eliminates the requirement of floor function and thereby allows low-complexity FPGA implementation. The use of an internal multiplier of FPGA and the sharing of resources for quadrature phase-shift keying, 16-quadrature-amplitude modulation (QAM), and 64-QAM modulations along with all possible code rates makes our approach to be novel and highly efficient when compared with conventional look-up table-based approach. The proposed approach exhibits significant improvement in the use of FPGA resources. Exhaustive simulation has been carried out to claim supremacy of our proposed work.

• 出版日期2013-8