A Fault-Tolerant and Efficient XOR Structure for Modular Design of Complex QCA Circuits

作者：Poorhosseini Mehrdad^*; Hejazi Ali Reza

来源：Journal of Circuits, Systems, and Computers, 2018, 27(7): 1850115.

DOI：10.1142/S0218126618501153

• QCA
• XOR
• fault tolerance
• computer-aided design
• adder
• parity generator/checker
• modular design

Despite its important existing challenges, quantum-dot cellular automata (QCA) is one of the promising replacement candidates of the traditional VLSI technology. Practical implementation issues such as fault tolerance and lack of customized CAD tools and algorithms for automatic synthesis of large complex systems are some important instances of QCA circuit design challenges. Currently, most of the research papers focus only on development of individually efficient QCA gates and circuits in terms of only their physical properties such as area and delay. However, throughout this paper, it is demonstrated that these compressed and fast individual QCA gates and circuits cause serious concerns when they are exploited as building blocks in modular design of higher level complex circuits. Some simple but effective design rules are then emphasized to solve this problem by preserving the "modular design efficiency" of the developed underlying QCA gates and circuits. As a case study, two new instances of fault-tolerant QCA XOR gates are introduced which are designed by simultaneously considering both area/delay and modular design efficiency rules. A wide range of numerical experiments are provided throughout the paper to prove the priority of the proposed gates with respect to eight other samples of the most efficient existing XOR structures, when exploiting them to build more complex circuits such as adders and error detection/correction circuits.

• 出版日期2018-6-30