摘要

A generalized multilevel inverter (MLI) with front-end dc-dc conversion stage followed by a synchronized H-bridge is presented. By using this configuration along with the proposed embedded control, any desired number of levels (n) in the output voltage can be produced. The dc-dc conversion stage employs an asynchronous buck converter. The duty cycle of dc-dc converter is varied in the form of m-level piecewise constant (PWC) unidirectional sine wave to produce a similar output voltage across the dc-link capacitor. The unidirectional PWC voltage is made into n-level ac voltage, where n = (2m - 1), by the synchronized H-bridge. Hence, it is named as dc-dc-ac MLI. An 8-bit Xilinx SPARTAN 3AN field programmable gate array (FPGA)-based digital controller is utilized for the simultaneous generation of high-frequency switching pulses for dc-dc converter and synchronized fundamental frequency switching pulses for H-bridge. The desired number of levels in ac output voltage and its frequency are the essential inputs to the pulse generation algorithm implemented in FPGA. The proposed MLI is simulated in MATLAB/Simulink environment; its functioning is verified with resistive (R) and resistive-inductive (R-L) loads. The hardware prototype of MLI is built in the laboratory and its performance is validated with R, R-L loads, and few home appliances.

  • 出版日期2015-7