Area-time efficient modulo 2(n)-1 adder design using hybrid carry selection

作者：Lin Su Hon^*; Shew Ming Hwa

来源：IEICE Transactions on Information and Systems, 2008, E91D(2): 361-362.

DOI：10.1093/ietisy/e91-d.2.361

• residue number system
• hybrid carry selection
• modulo 2(n)-1 adder
• architecture

A new Hybrid-Carry-Selection (HCS) approach for deriving an efficient modulo 2(n)-1 addition is presented in this study. Its resulting adder architecture is simple and applicable for all n values. Based on 180-nm CMOS technology, the HCS-based modulo 2(n)-1 adder demonstrates its superiority in Area-Time (AT) performance over existing solutions.

• 出版日期2008-2