科研之友
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摘要
The series configuration of fast semiconductor switches seems to be the key component in the high-voltage and fast rising time pulse generation. In this approach, two important issues must be considered. The first is to provide a safe operating condition for the switches in transient intervals. The second is to design a gate drive system with the capability of driving a large number of discrete devices simultaneously. The aim of this paper is to obviate these two requirements. First, different factors affecting the unbalanced voltage sharing between the series switches are discussed. In this investigation, the switch-to-ground parasitic capacitance effect has been recognized as the major effect on the unbalanced voltage sharing in the transient interval. Two schemes for abating this effect are proposed. To solve the unbalanced voltage distribution, the structure with a snubber circuit in the clamp mode operation is suggested. This scheme can be used for any number of switches without destructively affecting their behavior. In addition, the output pulse with a fast rising time could be obtained by the proposed gate drive system. In order to evaluate the operation of the proposed structure, a stacked switch with the voltage capability of 36 kV is tested experimentally. The characteristics of the obtained pulse are the fast rising time ( 69.5 ns) with the dV/dt of 460 kv/mu s and the wide range of the pulsewidth adjusting to 0.5-15 mu s. In addition, the voltage variance of the switches level in the series structure is about 10%.
- 出版日期2016-10
