摘要

A new adaptive bandwidth, adaptive jitter frequency synthesizer is proposed. This synthesizer is designed in such a way that the ratio of bandwidth to the reference frequency is kept approximately fixed in order to maintain the optimum jitter performance. The proposed structure employs a novel programmable charge pump and a charge pump controller circuit. Regarding the control voltage of the LC voltage controlled oscillator (VCO), the charge pump controller determines the output sink/source current of the charge pump and maintains the ratio of the charge pump current to the VCO oscillation frequency fixed. It is shown that using this idea and proposed building blocks, variations of the desired ratio of the bandwidth to the reference frequency are canceled and thus, the optimum output jitter manner of the frequency synthesizer is preserved. The proposed structure is simulated in 0.18 A mu m CMOS technology and simulation results are presented and discussed.

  • 出版日期2018-9