A low power CMOS voltage reference generator with temperature and process compensation

作者：Xie, Liangbo^*; Liu, Jiaxin; Wang, Yao; Han, Yu; Wen, Guangjun

来源：Analog Integrated Circuits and Signal Processing, 2014, 81(1): 313-324.

DOI：10.1007/s10470-014-0360-7

• CMOS voltage reference
• Process compensation technique
• Voltage deviation
• Low power

A low power CMOS voltage reference with process compensation is presented in TSMC 0.18-mu m standard CMOS technology. Detailed analysis of the process compensation technique is discussed. The circuit is simulated with Spectre. Simulation results show that, without any trimming procedure, the output voltage achieves a maximum deviation of 0.35 % across different process corners. The temperature coefficient of the proposed circuit is 12.7 ppm/A degrees C in a temperature range from -40 to 85 A degrees C and the line sensitivity is 0.036 mV/V with a supply voltage range from 1.2 to 2.5 V under typical condition. The maximum supply current is 390.4 nA at maximum supply voltage and -40 A degrees C. The power supply rejection ratio is -68.3 dB at 100 Hz and 2.5 V without any filtering capacitor.

• 出版日期2014-10
• 单位电子科技大学