Development of a low-noise, 4th-order readout ASIC for CdZnTe detectors in gamma spectrometer applications

作者：Wang, Jia^*; Su, Lin; Wei, Xiaomin; Zheng, Ran; Hu, Yann

来源：Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment , 2016, 831: 272-275.

DOI：10.1016/j.nima.2016.04.041

• CdZnTe detectors
• Low noise
• Adjustable peaking time

This paper presents an ASIC readout circuit development, which aims to achieve low noise. In order to compensate the leakage current and improve gain, a dual-stage CSA has been utilized. A 4th-order high linearity shaper is proposed to obtain a Semi-Gaussian wave and further decrease the noise induced by the leakage current. The ASIC has been designed and fabricated in a standard commercial 2P4M 0.35 mu m CMOS process. Die area of one channel is about 1190 pm x 147 pm. The input charge range is 1.8 fC. The peaking time can be adjusted from 1 tts to 3 is. Measured ENC is about 55e- (rms) at input capacitor of 0 F. The gain is 271 mV/fC at the peaking time of 1 mu s.

• 出版日期2016-9-21
• 单位西北工业大学