Embedded Trench Redistribution Layers at 2-5 mu m Width and Space by Excimer Laser Ablation and Surface Planer Processes for 20-40 mu m I/O Pitch Interposers

作者：Suzuki Yuya^*; Hichri Habib; Wei Frank; Sundaram Venky; Tummala Rao

来源：IEEE Transactions on Components Packaging and Manufacturing Technology, 2017, 7(6): 838-845.

DOI：10.1109/TCPMT.2017.2676023

• Embedded trench
• excimer laser
• fan-out
• interposer
• microvia
• panel scalable
• polymer dielectric
• redistribution layer (RDL)
• surface planar

This paper reports on one of the first demonstrations of the formation and metallization of 2-5-mu m lines and spaces by an embedded trench method in two dry-film polymer dielectrics, Ajinomoto build-up film and preimidized polyimide, without using chemical mechanical planarization. The trenches and vias in 8-15-mu m-thick dry-film dielectrics were formed by 308-nm excimer laser ablation, followed by the metallization of the trenches and vias by copper electrodeposition. A low-cost planarization process was used to remove the copper overburden with a surface planer tool. Using an optimized set of materials and processes, multilayer redistribution layers with 2-5 mu m trenches and vias were successfully demonstrated. Although thin film processes on silicon wafers have been able to achieve 40-mu m I/O pitch for interposers, the materials and processes integrated in this paper are scalable to large panel fabrication at much higher throughput, for interposers and high-density fan-out packaging at lower cost and higher performance than silicon interposers.

• 出版日期2017-6