摘要

This paper analyzes the back-off efficiency enhancement characteristics of transformer combined power amplifiers taking into account the amplifier and transformer parasitics. The dynamic power combining properties of different transformer architectures are investigated. The co-optimization of the transformer and the amplifiers is presented for the transformer-based Doherty power amplifier which is a linear class of operation with back-off efficiency enhancement. Then this analysis is extended for the uneven Doherty power amplifier which employs asymmetrical transformers. The proposed design methodology is used to design a 2.4 GHz uneven Doherty power amplifier in standard 90 nm CMOS technology. The fabricated two stage Doherty amplifier achieves 26.2 dBm peak output power at 2 V supply. The measured peak drain efficiency of the PA is 37% while the efficiency at 6 dB back-off is still as high as 30.1%.

  • 出版日期2013-4