摘要

Channel carrier mobility in MOSFETs is a key parameter for process development, material selection, and device modeling. The existing techniques for mobility evaluation suffer from one or more of the following shortcomings: slow speed and vulnerability to fast trapping, drain bias (V-d) dependence, cable-changing, sensitivity to gate leakage, complex procedure, and a need for simulation. This paper proposes and develops a new technique to overcome these shortcomings. I-d-V-g and C-cg-V-g are simultaneously measured so that the effect of V-d on mobility is inherently taken into account, and the measured mobility becomes V-d-independent. The cable connection switching between I-d-V-g and C-cg-V-g measurements is avoided, and the measurement completes in one pulse. This allows the measurement time reducing to the order of microseconds and, in turn, minimizing the effect of charge trapping. Unlike the standard high-frequency C-cg-V-g, C-cg is independent of gate leakage here, and the applicability of new technique to thin gate oxides of high gate leakage will be demonstrated. These advantages, together with its easy implementation, should make this technique a simple and robust tool for process development, material selection, and device modeling in future generations of CMOS technology.

  • 出版日期2012-7