Design of multigigabit multiplexer-loop-based decision feedback equalizers

作者：Parhi; Keshab K.

来源：IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2005, 13(4): 489-493.

DOI：10.1109/TVLSI.2004.842935

• Look-ahead
• Multiplexer loops
• Pipelining
• Retiming algorithms

This paper presents novel approaches for pipelining of parallel nested multiplexer loops and decision feedback equalizers (DFEs) based on look-ahead techniques. Look-ahead techniques can be applied to pipeline a nested multiplexer loop in many possible ways. It is shown that not all the look-ahead approaches necessarily result in improved performance. A novel look-ahead approach is identified, which can guarantee improvement in performance either in the form of pipelining or parallelism. The proposed technique is demonstrated and applied to design multiplexer-loop-based DFEs with throughput in the range of 3.125-10 Gb/s.

• 出版日期2005