A novel switching scheme and area-saving architecture for SAR ADC

作者：Ding, Ruixue; Liang, Hongzhi; Liu, Shubin^*

来源：Analog Integrated Circuits and Signal Processing, 2017, 91(1): 149-154.

DOI：10.1007/s10470-017-0924-4

• SAR ADC
• Energy-efficient
• Area-saving
• Switching scheme
• Split-MSB

A novel area-saving architecture and energy-efficient capacitor switching scheme for successive approximation register (SAR) analogue-to-digital converters is proposed. In the proposed architecture, the higher voltage potential side of the capacitor array removes the most-significant bit (MSB) capacitor. Furthermore the proposed technique achieves 81.25% reduction in capacitor area over the conventional SAR. Based on the third reference voltage V (CM) and split-MSB switching procedure, the proposed switching scheme achieves 98.53% less switching energy over the conventional architecture, while no reset power dissipation. Besides the significant energy saving, this asymmetric capacitor architecture also has a well performance in linearity simulation. Resulting from the Matlab simulation for capacitor mismatch, the maximum differential nonlinearity and maximum integral nonlinearity of the proposed scheme are 0.152LSB and 0.115LSB, respectively.

• 出版日期2017-4
• 单位西安电子科技大学