Determination of Wafer Start Mix in Semiconductor Manufacturing During New Technology Ramp-Up: Model, Solution Method, and an Empirical Study

作者：Chang Kuo Hao^*; Hsieh Liam Y

来源：IEEE Transactions on Systems, Man, and Cybernetics: Systems , 2016, 46(2): 294-302.

DOI：10.1109/TSMC.2015.2426174

• Semiconductor manufacturing
• simulation metamodeling
• wafer start mix

In semiconductor manufacturing, production rampup is a necessary phase before a new technology is introduced because it affects not only the time-to-market, but also the time-to-volume (the time to reach mass production). In production ramp-up, engineering lots are implemented in order to collect data for product and equipment qualification, and they are expected to achieve short cycle times (CTs) and high throughputs. On one hand, the increment of the amount of engineering lots will disrupt the smoothness of the manufacturing flow and cause work-in-process (WIP) bubbles. On the other hand, to ensure the feasibility of the production plan, some throughput and CT targets must be achieved. There is a need to determine an appropriate wafer start mix to strike a balance between the conflicting objectives. However, the complexity and stochasticity existing in the semiconductor manufacturing process makes it a very difficult task. This paper modeled the wafer start mix determination problem and proposed an efficient methodology, called progressive simulation optimization (PSO), based on the simulation metamodeling techniques to handle this problem. The goal was to find the optimal wafer start mix that enables maximum throughput of engineering lots, while satisfying the requirement of CT of normal lots (NL). A numerical study was conducted to evaluate the performance of the proposed PSO, and an empirical study based on real data was conducted to validate the viability of the proposed methodology in practice.
Note to Practitioners: A fast ramp-up of new technology is critical for maintaining the competitive advantage of a semiconductor manufacturing company. For example, the introduction of new technology such as die shrink or wire width reduction not only increases the production volume (wafer out) but also reduces per wafer cost. Obviously, yield enhancement plays a key role in speeding up the new technology ramp-up. Although yield enhancement can be beneficial from introducing more engineering lots into the manufacturing system, an unrestricted increment of engineering lots will disrupt the smoothness of the manufacturing flow and cause WIP bubbles. Focusing on a real setting, this paper provided a novel methodology that combines computer simulation and a sequential metamodeling procedure to efficiently obtain the most appropriate wafer start mix that supports a maximum throughput of engineering lots while satisfying the CT target of NL. This approach was validated by a numerical study and an empirical study.

• 出版日期2016-2
• 单位清华大学