A LOW-VOLTAGE SCALABLE (1.8 V-0.75 V) CMOS FOLDED-CASCODE LC QUADRATURE VCO FOR RF RECEIVERS

作者：Hasan S M Rezaul^*

来源：Journal of Circuits, Systems, and Computers, 2010, 19(4): 835-857.

DOI：10.1142/S0218126610006475

• Quadrature VCO
• supply voltage scaling
• phase noise
• CMOS
• folded cascode
• negative resistance

This paper presents a scalable low voltage CMOS folded-cascode quadrature voltage controlled oscillator (QVCO) design for radio-frequency (RF) applications using the TSMC 0.18 mu m 6M1P CMOS process technology. The simulated startup behavior of this proposed QVCO topology indicates that, the QVCO is free from bi-modal oscillation (frequency ambiguity). The QVCO provided extended voltage swing with the supply voltage scalable in the range of 1.8 V to 0.75 V. The QVCO operates in the frequency range of 4 GHz to 3 GHz (corresponding to supply voltage scaling in the range of 1.8V to 0.75 V) with around 11.7% tuning range and low quadrature error. The QVCO had a power consumption under 10 mW within the specified supply voltage scaling range. Phase noise simulations using the Monte Carlo analysis provide an approximate phase noise estimate of approximate to -150 dBc/Hz at an or set of 600 KHz from the center frequency (@3.7 GHz) for operation using the 1.8 V supply voltage, using moderate inductor-Q values. Monte Carlo simulations were also carried out to determine the effects of the process, voltage and temperature variations.

• 出版日期2010-6