A 0.5 V, 650 pW, 0.031%/V Line Regulation Subthreshold Voltage Reference

作者：Wang, Yuwei; Zhang, Ruizhi; Sun, Quan; Zhang, Hong^*

来源：44th IEEE European Solid State Circuits Conference (ESSCIRC), Dresden, GERMANY, 2018-09-03 To 2018-09-06.

DOI：10.1109/ESSCIRC.2018.8494332

• subthreshold voltage reference
• self-bias
• PSRR
• line regulation

This paper presents a self-biased subthreshold voltage reference using the V-TH difference between a thick-oxide MOS and a thin-oxide MOS to compensate the thermal voltage's temperature coefficient (TC). Based on theoretical analysis, the thick-oxide MOS's drain is selected as the output with optimized bias current, resulting in a robust voltage reference insensitive to process and supply variations. Fabricated in a 0.18-mu m 1.8 V/3.3 V CMOS process, the proposed circuit achieves a line regulation of 0.031%/V under a supply voltage range from 0.5 to 2.2 V and a PSRR of -61.5 dB at 100 Hz before trimming. Under 25 degrees C and a 1.2-V supply voltage, the average output voltage before trimming for 27 samples is 211.46 mV with standard deviation of only 0.64 mV (sigma/mu = 0.3%). The average TCs before and after trimming are 152.8 and 11.4 ppm/degrees C, respectively, with total power consumption of 650 pW at 0.5 V and active area of 0.0012 mm(2).

• 出版日期2018
• 单位西安交通大学